Symmetric shared memory architecture

Symmetric shared memory architectures •         Multiple processors are connected to multiple memory modules such that each processor can access any other processor’s memory module.  This multiprocessor employs a shared address space (also known as a single address space). •         Communication is implicit with loads and stores –  there is no explicit recipient of a shared memory access. •         Processors may communicate without necessarily being aware of one another. •         A single image of the operating system runs across all the processors. Two styles of shared memory architecture: UMA (Uniform Memory Access) •         The time to access main memory is the same for all processors since they are equally close to all memory locations. •         Machines that use UMA are called Symmetric Multiprocessors (SMPs). •         In a typical SMP architecture, all memory accesses are posted to the same shared memory bus. •         Contention - as more CPUs are added, competition for access to the bus leads to a decline in performance. •         Thus, scalability is limited to about 32 processors. NUMA (Non-Uniform Memory Access) •         Since memory is physically distributed, it is faster for a processor to access its own local memory  than non-local memory (memory local to another processor or shared between processors). •         Unlike SMPs, all processors are not equally close to all memory locations. •         A processor’s own internal computations can be done in its local memory leading to reduced memory contention. •         Designed to surpass the scalability limits of SMPs. Symmetric Shared Memory Architecture: Symmetric shared-memory machines usually support the caching of both shared and private data.      Private data  are used by a single processor, while Shared data are used by multiple processors, essentially providing communication among the processors through reads and writes of the shared data. Caching of shared data, however, introduces a new problem: cache coherence. Cache: •         Modern processors use a faster, smaller cache memory to act as a buffer for slower, larger memory. •         Caches exploit the principal of locality in memory accesses.                         Temporal locality – the concept that if data is            referenced, it will tend to be referenced again soon after.            Spatial locality – the concept that data is more likely to         be referenced soon if data near it was just referenced. •         Caches hold recently referenced data, as well as data near the recently referenced data. •         This can lead to performance increases by reducing the need to access main memory on every reference.