Instruction set principles - Basics of a RISC Instruction Set

Ø  Default RISC (reduced instruction set computer) architecture or load-store architecture is MIPS. Properties: §  All operations on data apply to data in registers and typically change the entire register (32 or 64 bits per register). §  Operations that affect memory are load and store operations that move data from memory to a register or to memory from a register. §  The instruction formats are typically being one size. Ø  MIPS64, the 64-bit version of the MIPS instruction set. The extended 64-bit instructions have a D on the start or end of the mnemonic. Ø  the MIPS instruction set provides 32 registers. Ø  3 classes of instructions: ALU instructions—These instructions take either two registers or a register and a sign-extended immediate, operate on them, and store the result into a third register. Ex: DADD,DSUB Load and store instructions—These instructions take a register source, called the base register, immediate field (16-bit in MIPS), called the offset,as operands. The sum—called the effective address—of the contents of the base register and the sign-extended offset is used as a memory address. Branches and jumps—Branches are conditional transfers of control.  two ways of specifying the branch condition in RISC architectures: ·         a set of condition bits (sometimes called a condition code) ·          a limited set of comparisons between a pair of registers or between a register and zero